The present invention relates to programmable apparatus and/or programming methods. More particularly, but not exclusively, the present invention relates to techniques to selectively access multiple registers of a programmable device that have the same programming identifier.
Digital processors and other programmable devices frequently include a number of individually accessible hardware registers. Typically, each register has a unique assembly language programming name or xe2x80x9clogical identifierxe2x80x9d that can be referenced by a corresponding assembly language instruction to utilize such register as an operand. Correspondingly, to some extent, higher-level application programs that have been complied into a lower-level executable form, are generally dependent upon a given register arrangement for proper operation.
From time-to-time, it is desirable to alter the register arrangement of a processor. In one common example, the total number of available registers is expanded as part of an effort to design a more capable xe2x80x9cnext generationxe2x80x9d processor. In another example, a correction to an existing design can result in the addition of one or more hardware registers. Concomitant with these efforts, is the goal of maintaining compatibility with pre-existing programs.
Thus, there is an ongoing demand for new ways to implement changes to the register arrangement of a programmable device.
One embodiment of the present invention is a unique technique for utilizing multiple registers. Other embodiments of the present invention include unique devices, methods, systems, and apparatus to provide access to registers having a common register name or identifier.
A further embodiment of the present invention includes operating a programmable device including a first register and a second register that have a register name in common. This name is referenced in a programming instruction. The programming instruction is performed with the first register if a first condition is satisfied and with the second register if a second condition is satisfied.
Still a further embodiment comprises: operating a processor that has a number of registers, including a stack pointer register and a general purpose register with a register identifier in common; referencing this identifier with a programming instruction; and performing the programming instruction with one of the stack pointer register and the general purpose register based on a predefined condition.
In another embodiment, a processor includes a first register and a second register having a common identifier. This identifier is referenced by a programming instruction that is performed with the first register under a first condition and the second register under a second condition. The first condition and the second condition can each be established during a common mode of operating the processor. In one form, the first register is of a general purpose type and the second register provides a stack pointer.
For yet another embodiment of the present invention, a processor has two or more registers that include a first register and a second register with a register name in common. Under a first condition, this name is referenced to load a pointer to a memory space in the first register. Another programming instruction is executed that refers to the register name under a second condition to change contents of the second register. These contents are stored in the memory space based on the pointer provided with the first register.
Still another embodiment includes a programmable device with two or more registers that have the same programming identifier. If this identifier is referenced by a programming instruction, one of the registers is selected for access based on a condition/status. Access to one of the registers is more constrained than another. This constraint can be in terms of a limit on the quantity of instructions executed with the more constrained register for each establishment of the condition or status and/or a limit on the types of instructions that can be executed with the more constrained register.
For a further embodiment of the present invention, a programmable device is operated that includes a default register and an alternate register that are both identified by the same register name. A number of instructions are executed that reference this name with the default register unless a predefined condition is established. For each establishment of this condition, a preset instruction quantity limit for instruction performance with the alternate register instead of the default register is provided. In one form, this quantity limit is only one instruction, such that the predefined condition would need to be re-established for each instruction to be executed with the alternate register.
Yet a further embodiment is directed to an apparatus that carries programming instructions for execution by a processor. The processor includes a general purpose register and a stack pointer register having a register name in common. The programming instructions are operable to establish a stack pointer access condition, load a memory pointer into the stack pointer register by reference to the register name in response to establishment of this condition, reference the register name to perform a user routine with the general purpose register under an operating condition different than the stack pointer access condition, re-establish the stack pointer register access condition and store contents of the general purpose register in memory based on the pointer in response to an interrupt, perform an interrupt routine with the general purpose register, and restore the contents of the general purpose register from the memory based on the pointer after performance of the interrupt routine.
Accordingly, one object of the present invention is to provide a unique technique for utilizing multiple registers.
Another object of the present invention is to provide a unique device, method, system, or apparatus relating to multiple registers having a common name.
Further objects, embodiments, forms, features, benefits, and advantages of the present invention shall become apparent from the description and figures included herewith.